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Aminet 37 (2000)(Schatztruhe)[!][Jun 2000].iso
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IO2313.H
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Text File
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2000-03-17
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3KB
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196 lines
;***** I/O Register Definitions
SREG EQU $3f
SPL EQU $3d
GIMSK EQU $3b
GIFR EQU $3a
TIMSK EQU $39
TIFR EQU $38
MCUCR EQU $35
TCCR0 EQU $33
TCNT0 EQU $32
TCCR1A EQU $2f
TCCR1B EQU $2e
TCNT1H EQU $2d
TCNT1L EQU $2c
OCR1AH EQU $2b
OCR1AL EQU $2a
ICR1H EQU $25
ICR1L EQU $24
WDTCR EQU $21
EEAR EQU $1e
EEARL EQU $1e
EEDR EQU $1d
EECR EQU $1c
PORTB EQU $18
DDRB EQU $17
PINB EQU $16
PORTD EQU $12
DDRD EQU $11
PIND EQU $10
UDR EQU $0c
USR EQU $0b
UCR EQU $0a
UBRR EQU $09
ACSR EQU $08
;***** Bit Definitions
SP7 EQU 7
SP6 EQU 6
SP5 EQU 5
SP4 EQU 4
SP3 EQU 3
SP2 EQU 2
SP1 EQU 1
SP0 EQU 0
INT1 EQU 7
INT0 EQU 6
INTF1 EQU 7
INTF0 EQU 6
TOIE1 EQU 7
OCIE1A EQU 6
TICIE EQU 3
TOIE0 EQU 1
TOV1 EQU 7
OCF1A EQU 6
ICF1 EQU 3
TOV0 EQU 1
SE EQU 5
SM EQU 4
ISC11 EQU 3
ISC10 EQU 2
ISC01 EQU 1
ISC00 EQU 0
CS02 EQU 2
CS01 EQU 1
CS00 EQU 0
COM1A1 EQU 7
COM1A0 EQU 6
PWM11 EQU 1
PWM10 EQU 0
ICNC1 EQU 7
ICES1 EQU 6
CTC1 EQU 3
CS12 EQU 2
CS11 EQU 1
CS10 EQU 0
WDTOE EQU 4
WDE EQU 3
WDP2 EQU 2
WDP1 EQU 1
WDP0 EQU 0
EEMWE EQU 2
EEWE EQU 1
EERE EQU 0
PB7 EQU 7
PB6 EQU 6
PB5 EQU 5
PB4 EQU 4
PB3 EQU 3
PB2 EQU 2
PB1 EQU 1
PB0 EQU 0
DDB7 EQU 7
DDB6 EQU 6
DDB5 EQU 5
DDB4 EQU 4
DDB3 EQU 3
DDB2 EQU 2
DDB1 EQU 1
DDB0 EQU 0
PINB7 EQU 7
PINB6 EQU 6
PINB5 EQU 5
PINB4 EQU 4
PINB3 EQU 3
PINB2 EQU 2
PINB1 EQU 1
PINB0 EQU 0
PD6 EQU 6
PD5 EQU 5
PD4 EQU 4
PD3 EQU 3
PD2 EQU 2
PD1 EQU 1
PD0 EQU 0
DDD6 EQU 6
DDD5 EQU 5
DDD4 EQU 4
DDD3 EQU 3
DDD2 EQU 2
DDD1 EQU 1
DDD0 EQU 0
PIND6 EQU 6
PIND5 EQU 5
PIND4 EQU 4
PIND3 EQU 3
PIND2 EQU 2
PIND1 EQU 1
PIND0 EQU 0
RXC EQU 7
TXC EQU 6
UDRE EQU 5
FE EQU 4
OR EQU 3
RXCIE EQU 7
TXCIE EQU 6
UDRIE EQU 5
RXEN EQU 4
TXEN EQU 3
CHR9 EQU 2
RXB8 EQU 1
TXB8 EQU 0
ACD EQU 7
ACO EQU 5
ACI EQU 4
ACIE EQU 3
ACIC EQU 2
ACIS1 EQU 1
ACIS0 EQU 0
XL DEF r26
XH DEF r27
YL DEF r28
YH DEF r29
ZL DEF r30
ZH DEF r31
RAMEND EQU $DF ;Last On-Chip SRAM Location
XRAMEND EQU $DF
E2END EQU $7F
FLASHEND EQU $3FF
RESET_VECT EQU $0000 ;Reset vector
INT0addr EQU $001 ;External Interrupt0 Vector Address
INT1addr EQU $002 ;External Interrupt1 Vector Address
ICP1addr EQU $003 ;Input Capture1 Interrupt Vector Address
OC1addr EQU $004 ;Output Compare1 Interrupt Vector Address
OVF1addr EQU $005 ;Overflow1 Interrupt Vector Address
OVF0addr EQU $006 ;Overflow0 Interrupt Vector Address
URXCaddr EQU $007 ;UART Receive Complete Interrupt Vector Address
UDREaddr EQU $008 ;UART Data Register Empty Interrupt Vector Address
UTXCaddr EQU $009 ;UART Transmit Complete Interrupt Vector Address
ACIaddr EQU $00a ;Analog Comparator Interrupt Vector Address
ROMSTART EQU $000b